1. Field of the Invention
The present invention relates to a shift register circuit and gate signal generation method thereof, and more particularly, to a Shift register circuit having simplified architecture and gate signal generation method thereof.
2. Description of the Prior Art
Along with the advantages of thin appearance, low power consumption, and low radiation, liquid crystal displays have been widely applied in various electronic products for panel displaying. The operation of a liquid crystal display is featured by varying voltage drops between opposite sides of a liquid crystal layer for twisting the angles of the liquid crystal molecules in the liquid crystal layer so that the transmittance of the liquid crystal layer can be controlled for illustrating images with the aid of the light source provided by a backlight module.
In general, the liquid crystal display comprises plural pixel units, a gate driver, and a source driver. The source driver is utilized for providing plural data signals to be written into the pixel units. The gate driver comprises a shift register circuit which is employed to generate plural gate signals for controlling the operations of writing the data signals into the pixel units. That is, the shift register circuit is a crucial device for providing a control of writing the data signals into the pixel units.
FIG. 1 is a schematic diagram showing a prior-art shift register circuit 100. As shown in FIG. 1, the shift register circuit 100 includes a plurality of shift register stages 120. Each shift register stage 120 comprises an input unit 125, a pull-up unit 130, a first control unit 135, a first pull-down unit 140, a second control unit 145, a second pull-down unit 150 and an auxiliary pull-down unit 160. Each shift register stage 120 is employed to generate a corresponding gate signal according to a first clock CK1 and a second clock CK2 in conjunction with the gate signal generated by a preceding shift register stage 120. The gate signals generated by the shift register circuit 100 are furnished to the pixel units 103 of a pixel array 101 for providing a control of writing operations over the data signals of a gate line DLi. However, regarding the operation of the shift register circuit 100, each shift register stage 120 is used only to generate a corresponding gate signal, and therefore the circuit structure of the shift register circuit 100 is quite complicated. For that reason, how to provide a shift register circuit having simplified architecture so as to bring the cost down has become one of the most important topics nowadays.